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B.1
Addresses
Register
Address
Name
Bit 7
H'FDAC DADR2
H'FDAD DADR3
H'FDAE DACR23
DAOE1 DAOE0 DAE
H'FDB0 IrCR
IrE
H'FDB4 SCRX
—
H'FDB5 DDCSWR SWE
H'FDB8 DADRAH0/
DA13/
DACR0
TEST
H'FDB9 DADRAL0 DA5
H'FDBA DADRBH0/
DA13/
DACNTH0
H'FDBB DADRBL0/
DA5/
DACNTL0
H'FDBC DADRAH1/
DA13/
DACR1
TEST
H'FDBD DADRAL1 DA5
H'FDBE DADRBH1/
DA13/
DACNTH1
H'FDBF DADRBL1/
DA5/
DACNTL1
H'FDC0
TCR2
CMIEB
H'FDC1
TCR3
CMIEB
H'FDC2
TCSR2
CMFB
H'FDC3 TCSR3
CMFB
H'FDC4 TCORA2
H'FDC5 TCORA3
H'FDC6 TCORB2
H'FDC7 TCORB3
H'FDC8 TCNT2
H'FDC9 TCNT3
H'FDD0
SMR3
C/A
SMR3
GM
H'FDD1
BRR3
H'FDD2 SCR3
TIE
H'FDD3 TDR3
996
Appendix B Internal I/O Register
Bit 6
Bit 5
Bit 4
—
IrCKS2
IrCKS1
IrCKS0
IICX1
IICX0
IICE
SW
IE
IF
DA12/
DA11/— DA10/— DA9/
PWME
DA4
DA3
DA2
DA12/
DA11/
DA10/
DA4/
DA3/
DA2/
DA12/
DA11/— DA10/— DA9/OEBDA8/OEADA7/OS DA6/CKS PWM1
PWME
DA4
DA3
DA2
DA12/
DA11/
DA10/
DA4/
DA3/
DA2/
CMIEA
OVIE
CCLR1
CMIEA
OVIE
CCLR1
CMFA
OVF
—
CMFA
OVF
—
CHR
PE
O/E
BLK
PE
O/E
RIE
TE
RE
Bit 3
Bit 2
Bit 1
—
—
—
—
—
—
FLSHE
—
—
CLR3
CLR2
CLR1
DA8/
DA7/OS DA6/CKS PWM0
OEB
OEA
DA1
DA0
CFS
DA9/
DA8/
DA7/
DA1/
DA0/
CFS/
DA1
DA0
CFS
DA9/
DA8/
DA7/
DA1/
DA0/
CFS/
CCLR0
CKS2
CKS1
CCLR0
CKS2
CKS1
OS3
OS2
OS1
OS3
OS2
OS1
STOP
MP
CKS1
BCP1
BCP0
CKS1
MPIE
TEIE
CKE1
Module
Data Bus
Bit 0
Name
Width (bits)
D/A2,
8
D/A3
—
—
SCI0, IrDA 8
—
IIC
8
CLR0
IIC
8
8
—
DA6/
REGS
8
—
DA6/
REGS
CKS0
TMR2,
16
TMR3
CKS0
OS0
OS0
CKS0
SCI3,
8
Smart card
CKS0
interface
CKE0
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