Hitachi H8S/2633 Hardware Manual page 191

Address bus
D15 to D8
Read
Write
D15 to D8
Note: n = 0 to 7
Figure 7-9 Bus Timing for 16-Bit 2-State Access Space (2) (Odd Address Byte Access)
ø
CSn
AS
RD
D7 to D0
HWR
LWR
D7 to D0
Bus cycle
T
1
High
High impedance
Valid
T
2
Invalid
Valid
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