ø
t
A23 to A0
t
CSD1
CS7 to CS0
AS
RD
(read)
D15 to D0
(read)
WR
(write)
D15 to D0
(write)
Figure 25-6 Basic Bus Timing (Two-State Access)
T
1
AD
t
AS
t
ASD
t
t
RSD1
ACC2
t
AS
t
ACC3
t
WRD2
t
AS
t
WSW1
t
WDD
T
2
t
AH
t
ASD
t
RSD2
t
t
RDS
RDH
t
WRD2
t
AH
t
WDH
895
