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SYSCR—System Control Register
Bit
:
MACS
Initial value
:
R/W
:
R/W
7
6
—
INTM1
0
0
—
R/W
NMI edge select
0
Interrupt request issued on falling edge of NMI input.
1
Interrupt request issued on rising edge of NMI input.
Interrupt control mode 1, 0
INTM1
INTM0
0
0
1
1
0
1
MAC saturation
0
Non-saturating calculation for MAC instruction
1
Saturating calculation for MAC instruction
Manual reset select bit
0
Manual reset disabled.
Pins P74/TMO2/MRES can be used as P74/TMO2 I/O pins.
1
Manual reset enabled.
Pins P74/TMO2/MRES can be used as MRES input pins.
H'FDE5
5
4
INTM0
NMIEG
0
0
R/W
R/W
Interrupt
control mode
0
Interrupt controlled by bit 1
—
Do not set.
2
Interrupt controlled by bits 12 to 10 and IPR.
—
Do not set.
3
2
MRESE
0
0
R/W
RAM Enable
0
Internal RAM disabled.
1
Internal RAM enabled.
System
1
0
—
RAME
0
1
—
R/W
1023
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