Hitachi H8S/2633 Hardware Manual page 194

Read
Write
Note: n = 0 to 7
Figure 7-12 Bus Timing for 16-Bit 3-State Access Space (2) (Odd Address Byte Access)
168
ø
Address bus
CSn
AS
RD
D15 to D8
D7 to D0
HWR
LWR
D15 to D8
D7 to D0
Bus cycle
T T
1 2
High
High impedance
Valid
T
3
Invalid
Valid