Hitachi H8S/2633 Hardware Manual page 143

Interrupts during Execution of EEPMOV Instruction

Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.

With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer

is not accepted until the move is completed.

With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt

exception handling starts at a break in the transfer cycle. The PC value saved on the stack in this

case is the address of the next instruction.

Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the

following coding should be used.

DTC and DMAC Activation by Interrupt

The DTC and DMAC can be activated by an interrupt. In this case, the following options are

• Interrupt request to CPU

• Activation request to DTC

• Activation request to DMAC

• Selection of a number of the above

For details of interrupt requests that can be used with to activate the DTC and DMAC, see

section 9, Data Transfer Controller and section 8, DMA Controller.

Block Diagram

Figure 5-9 shows a block diagram of the DTC interrupt controller.