Advertisement
Address H'FE2D
Bit
:
NDR7
Initial value :
R/W
:
R/W
Address H'FE2F
Bit
:
Initial value :
R/W
:
Different Triggers for Pulse Output Groups: If pulse output groups 2 and 3 are triggered by
different compare match events, the address of the upper 4 bits in NDRH (group 3) is H'FE2C and
the address of the lower 4 bits (group 2) is H'FE2E. Bits 3 to 0 of address H'FE2C and bits 7 to 4
of address H'FE2E are reserved bits that cannot be modified and are always read as 1.
Address H'FE2C
Bit
:
NDR15
Initial value :
R/W
:
R/W
Address H'FE2E
Bit
:
Initial value :
R/W
:
If pulse output groups 0 and 1 are triggered by different compare match event, the address of the
upper 4 bits in NDRL (group 1) is H'FE2D and the address of the lower 4 bits (group 0) is
H'FE2F. Bits 3 to 0 of address H'FE2D and bits 7 to 4 of address H'FE2F are reserved bits that
cannot be modified and are always read as 1. However, the H8S/2633 Series has no output pins
corresponding to pulse output groups 0 and 1.
502
7
6
NDR6
NDR5
0
0
R/W
7
6
—
—
1
1
—
—
7
6
NDR14
NDR13
0
0
R/W
7
6
—
—
1
1
—
—
5
4
NDR4
0
0
R/W
R/W
5
4
—
—
1
1
—
—
5
4
NDR12
0
0
R/W
R/W
5
4
—
—
NDR11
1
1
—
—
3
2
NDR3
NDR2
0
0
R/W
R/W
3
2
—
—
1
1
—
—
3
2
—
—
1
1
—
—
3
2
NDR10
0
0
R/W
R/W
1
0
NDR1
NDR0
0
0
R/W
R/W
1
0
—
—
1
1
—
—
1
0
—
—
1
1
—
—
1
0
NDR9
NDR8
0
0
R/W
R/W
Advertisement
