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Pin
PF3/LWR/ADTRG/
IRQ3
PF2/LCAS/WAIT/
BREQO
PF1/BACK/
BUZZ
396
Selection Method and Pin Functions
The pin function is switched as shown below according to the operating mode,
the bus mode, A/D converter bits TRGS1 and TRGS0, and bit PF3DDR.
Operating
mode
Bus mode
16-bit bus
PF3DDR
LWR output
Pin function
Notes: 1. ADTRG input when TRGS0 = TRGS1 = 1.
2. When used as an external interrupt input pin, do not use as an I/O
pin for another function.
The pin function is switched as shown below according to the combination of
the operating mode and bits RMTS2 to RMTS0, LCASS, BREQOE, WAITE,
ABW5 to ABW2, and PF2DDR.
Operating
Mode
LCASS
BREQOE
WAITE
PF2DDR
LCAS
Pin function
output
pin
Note: * Restricted to RMTS2 to TMTS0=B'001 to B'011, DRAM space 16-bit
access in modes 4 to 6 only.
The pin function is switched as shown below according to the combination of
the operating mode and bits BRLE, BUZZE, and PF1DDR.
Operating
Mode
BRLE
BUZZE
PF1DDR
Pin function
PF1
input
pin
Modes 4 to 6
8-bit bus mode
mode
—
0
PF3 input
pin
pin
Modes 4 to 6
0*
—
0
—
0
—
0
1
PF2
PF2
input
output
pin
pin
Modes 4 to 6
0
0
1
0
1
—
PF1
BUZZ
output
output
pin
pin
1
0
PF3 output
PF3 input
pin
pin
ADTRG input pin*
IRQ3 input pin*
2
1
1
1
—
—
—
WAIT
BREQO
input
output
pin
pin
1
—
0
—
0
BACK
PF1
output
input
pin
pin
Mode 7
—
1
PF3 output
pin
1
Mode 7
—
—
—
0
1
PF2
PF2
input
output
pin
pin
Mode 7
—
1
1
—
PF1
BUZZ
output
output
pin
pin
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