Hitachi H8S/2633 Hardware Manual page 294

Full Address Mode (Cycle Steal Mode): Figure 8-20 shows a transfer example in which TEND

output is enabled and word-size full address mode transfer (cycle steal mode) is performed from

external 16-bit, 2-state access space to external 16-bit, 2-state access space.

Figure 8-20 Example of Full Address Mode (Cycle Steal) Transfer

A one-byte or one-word transfer is performed, and after the transfer the bus is released. While the

bus is released one bus cycle is inserted by the CPU or DTC.

In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead

cycle is inserted after the DMA write cycle.

Last transfer