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Figure 7-14 shows an example of wait state insertion timing.
ø
WAIT
Address bus
Read
Data bus
HWR, LWR
Write
Data bus
indicates the timing of WAIT pin sampling.
Note:
The settings after a power-on reset are: 3-state access, 3 program wait state insertion, and WAIT
input disabled. At a manual reset, the bus control register values are retained and wait control
continues as before the reset.
T
1
AS
RD
Figure 7-14 Example of Wait State Insertion Timing
By program wait
By WAIT pin
T
T
2
w
Write data
T
T
w
w
Read data
T
3
171
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