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DACNTH0—PWM (D/A) Counter H0
DACNTL0—PWM (D/A) Counter L0
DACNTH1—PWM (D/A) Counter H1
DACNTL1—PWM (D/A) Counter L1
Bit (CPU)
:
15
Bit (counter)
:
7
Initial value
:
0
R/W
:
R/W
DACNTH
14
13
12
11
6
5
4
3
0
0
0
0
R/W
R/W
R/W
R/W
H'FDBA
H'FDBB
H'FDBE
H'FDBF
10
9
8
7
2
1
0
8
0
0
0
0
R/W
R/W
R/W
R/W
DACNTL
6
5
4
3
9
10
11
12
0
0
0
0
R/W
R/W
R/W
R/W
Register select
0 DADRA and DADRB access enabled
1 DACR and DACNT access enabled
PWM0
PWM0
PWM1
PWM1
2
1
0
13
—
—
REGS
0
1
1
R/W
—
R/W
1011
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