Hitachi H8S/2633 Hardware Manual page 192

Read
Write
Note: n = 0 to 7
Figure 7-10 Bus Timing for 16-Bit 2-State Access Space (3) (Word Access)
166
ø
Address bus
CSn
AS
RD
D15 to D8
D7 to D0
HWR
LWR
D15 to D8
D7 to D0
Bus cycle
T
1
Valid
Valid
T
2
Valid
Valid