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Hitachi H8S/2633 Hardware Manual page 813

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Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash
memory control registers (FLMCR1, FLMCR2, EBR1, and EBR2). Setting the FLSHE bit to 1
enables read/write access to the flash memory control registers. If FLSHE is cleared to 0, the flash
memory control registers are deselected. In this case, the flash memory control register contents
are retained.
Bit 3
FLSHE
Description
0
Flash control registers deselected in area H'FFFFA8 to H'FFFFAC
1
Flash control registers selected in area H'FFFFA8 to H'FFFFAC
Bits 2 to 0—Reserved: Should always be written with 0.
22.6
On-Board Programming Modes
When pins are set to on-board programming mode and a reset-start is executed, a transition is
made to the on-board programming state in which program/erase/verify operations can be
performed on the on-chip flash memory. There are two on-board programming modes: boot mode
and user program mode. The pin settings for transition to each of these modes are shown in table
22-6. For a diagram of the transitions to the various flash memory modes, see figure 22-2.
Table 22-6 Setting On-Board Programming Modes
Mode
Boot mode
User program mode
22.6.1
Boot Mode
When boot mode is used, the flash memory programming control program must be prepared in the
host beforehand. The SCI channel to be used is set to asynchronous mode.
When a reset-start is executed after the H8S/2633 Series' pins have been set to boot mode, the
boot program built into the H8S/2633 Series is started and the programming control program
prepared in the host is serially transmitted to the H8S/2633 Series via the SCI. In the H8S/2633
Series, the programming control program received via the SCI is written into the programming
control program area in on-chip RAM. After the transfer is completed, control branches to the start
address of the programming control program area and the programming control program execution
state is entered (flash memory programming is performed).
798
Expanded mode
Single-chip mode
Expanded mode
Single-chip mode
FWE
MD2
1
0
0
1
1
1
(Initial value)
MD1
MD0
1
0
1
1
1
0
1
1

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