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• RAS up mode
To select RAS up mode, clear the RCDM bit of the MCR to 0. If DRAM access is interrupted
to access another area, the RAS signal level returns to High. Burst operation is only possible
when the DRAM space is contiguous. Figure 7-24 shows example timing in RAS up mode.
Note that the RAS signal level does not return to High in burst ROM space access.
ø
A23 to A0
RD
HWR (WE)
CSn (RAS)
CAS, LCAS
D15 to D0
Note: n= 2 to 5
Figure 7-24 Example Operation Timing in RAS Up Mode
184
DRAM
write access
T
T
T
p
r
c1
DRAM
read access
T
T
T
c2
c1
c2
External space
write access
T
T
1
2
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