Advertisement
Bit 0—Start Condition/Stop Condition Prohibit (SCP): Controls the issuing of start and stop
conditions in master mode. To issue a start condition, write 1 in BBSY and 0 in SCP. A retransmit
start condition is issued in the same way. To issue a stop condition, write 0 in BBSY and 0 in SCP.
This bit is always read as 1. If 1 is written, the data is not stored.
Bit 0
SCP
Description
0
Writing 0 issues a start or stop condition, in combination with the BBSY flag
1
Reading always returns a value of 1
Writing is ignored
2
18.2.6
I
C Bus Status Register (ICSR)
Bit
:
ESTP
Initial value :
R/W
:
R/(W)*
Note: * Only 0 can be written, for flag clearing.
ICSR is an 8-bit readable/writable register that performs flag confirmation and acknowledge
confirmation and control.
ICSR is initialized to H'00 by a reset and in hardware standby mode.
Bit 7—Error Stop Condition Detection Flag (ESTP): Indicates that a stop condition has been
detected during frame transfer in I
7
6
STOP
IRTR
0
0
R/(W)*
R/(W)*
2
C bus format slave mode.
5
4
AASX
AL
0
0
R/(W)*
R/(W)*
3
2
AAS
ADZ
0
0
R/(W)*
R/(W)*
(Initial value)
1
0
ACKB
0
0
R/W
711
Advertisement
