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5.2.4
IRQ Sense Control Registers H and L (ISCRH, ISCRL)
ISCRH
Bit
:
IRQ7SCB
Initial value
:
R/W
R/W
:
ISCRL
Bit
:
IRQ3SCB
Initial value
:
R/W
:
R/W
The ISCR registers are 16-bit readable/writable registers that select rising edge, falling edge, or
both edge detection, or level sensing, for the input at pins IRQ7 to IRQ0.
The ISCR registers are initialized to H'0000 by a reset and in hardware standby mode.
They are not initialized in software standby mode.
Bits 15 to 0: IRQ7 Sense Control A and B (IRQ7SCA, IRQ7SCB) to IRQ0 Sense Control A and
B (IRQ0SCA, IRQ0SCB)
Bits 15 to 0
IRQ7SCB to
IRQ7SCA to
IRQ0SCB
IRQ0SCA
0
0
1
1
0
1
15
14
IRQ7SCA
IRQ6SCB
0
0
R/W
R/W
7
6
IRQ3SCA
IRQ2SCB
0
0
R/W
R/W
Description
Interrupt request generated at IRQ7 to IRQ0 input low level
Interrupt request generated at falling edge of IRQ7 to IRQ0 input
Interrupt request generated at rising edge of IRQ7 to IRQ0 input
Interrupt request generated at both falling and rising edges of
IRQ7 to IRQ0 input
13
12
IRQ6SCA
IRQ5SCB
0
0
R/W
R/W
5
4
IRQ2SCA
IRQ1SCB
0
0
R/W
R/W
11
10
IRQ5SCA
IRQ4SCB
0
0
R/W
R/W
3
2
IRQ1SCA
IRQ0SCB
0
0
R/W
R/W
9
8
IRQ4SCA
0
0
R/W
1
0
IRQ0SCA
0
0
R/W
(initial value)
97
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