5.1.2
Block Diagram
A block diagram of the interrupt controller is shown in Figure 5-1.
SYSCR
NMI input
IRQ input
Internal interrupt
request
SWDTEND to
TEI4
Legend
: IRQ sense control register
ISCR
: IRQ enable register
IER
: IRQ status register
ISR
: Interrupt priority register
IPR
: System control register
SYSCR
92
INTM1, INTM0
NMIEG
NMI input unit
IRQ input unit
ISR
ISCR
IER
Interrupt controller
Figure 5-1 Block Diagram of Interrupt Controller
Priority
determination
IPR
CPU
Interrupt
request
Vector
number
I
CCR
I2 to I0
EXR