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13.2.6
Module Stop Control Register A (MSTPCRA)
Bit
:
7
MSTPA7
Initial value
:
0
R/W
:
R/W
MSTPCRA is an 8-bit readable/writable register that performs module stop mode control.
When the MSTPA4 and MSTPA0 bits in MSTPCR is set to 1, the 8-bit timer operation stops at
the end of the bus cycle and a transition is made to module stop mode. For details, see section
24.5, Module Stop Mode.
MSTPCRA is initialized to H'3F by a power-on reset and in hardware standby mode. It is not
initialized by a manual reset and in software standby mode.
Bit 4—Module Stop (MSTPA4): Specifies the TMR0 and TMR1 module stop mode.
Bit 4
MSTPA4
Description
0
TMR0, TMR1 module stop mode cleared
1
TMR0, TMR1 module stop mode set
Bit 0—Module Stop (MSTPA0): Specifies the TMR2 and TMR3 module stop mode.
Bit 0
MSTPA0
Description
0
TMR2, TMR3 module stop mode cleared
1
TMR2, TMR3 module stop mode set
532
6
5
MSTPA6
MSTPA5
0
1
R/W
R/W
4
3
MSTPA4
MSTPA3
1
1
R/W
R/W
2
1
MSTPA2
MSTPA1
1
1
R/W
R/W
(Initial value)
(Initial value)
0
MSTPA0
1
R/W
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