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19.1.4
Register Configuration
Table 19-2 summarizes the registers of the A/D converter.
Table 19-2 A/D Converter Registers
Name
A/D data register AH
A/D data register AL
A/D data register BH
A/D data register BL
A/D data register CH
A/D data register CL
A/D data register DH
A/D data register DL
A/D control/status register
A/D control register
Module stop control register A
Notes: 1. Lower 16 bits of the address.
2. Bit 7 can only be written with 0 for flag clearing.
748
Abbreviation
ADDRAH
ADDRAL
ADDRBH
ADDRBL
ADDRCH
ADDRCL
ADDRDH
ADDRDL
ADCSR
ADCR
MSTPCRA
R/W
Initial Value
R
H'00
R
H'00
R
H'00
R
H'00
R
H'00
R
H'00
R
H'00
R
H'00
2
R/(W)*
H'00
R/W
H'33
R/W
H'3F
1
Address*
H'FF90
H'FF91
H'FF92
H'FF93
H'FF94
H'FF95
H'FF96
H'FF97
H'FF98
H'FF99
H'FDE8
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