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Bit 4—Compare Match Flag (CMF): This status flag shows a match between RTCNT and
RTCOR values.
When performing refresh control (RFSHE=1), write 1 to CMF when writing to the DRAMCR.
Bit 4
CMF
Description
0
[Clearing]
When CMF=1, read the CMF flag, then clear the CMF flag to 0.
1
[Setting]
CMF is set when RTCNT=RTCOR.
Bit 3—Compare Match Interrupt Enable (CMIE): This bit enables/disables the CMF flag
interrupt request (CMI) when the DRAMCR CMF flag is set to 1.
CMIE is always 0 when performing a self-refresh.
Bit 3
CMIE
Description
0
Disables CMF flag interrupt requests (CMI).
1
Enables CMF flag interrupt requests (CMI).
Bits 2 to 0—Refresh Counter Clock Select (CKS2 to CKS0): These bits select from the seven
internal clocks derived by dividing the system clock (ø) to be input to RTCNT. The RTCNT count
up starts when CKS2 to CKS0 are set to select the input clock.
Bit 2
Bit 1
CKS2
CKS1
0
0
1
1
0
1
152
Bit 0
CKS0
Description
0
Stops count.
1
Counts on ø/2
0
Counts on ø/8
1
Counts on ø/32
0
Counts on ø/128
1
Counts on ø/512
0
Counts on ø/2048
1
Counts on ø/4096
(Initial value)
(Initial value)
(Initial value)
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