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8.1.3
Overview of Functions
Tables 8-1 (1) and (2) summarize DMAC functions in short address mode and full address mode,
respectively.
Table 8-1 (1)
Overview of DMAC Functions (Short Address Mode)
Transfer Mode
Dual address mode
•
Sequential mode
1-byte or 1-word transfer
executed for one transfer request
Memory address
incremented/decremented by 1
or 2
1 to 65536 transfers
•
Idle mode
1-byte or 1-word transfer
executed for one transfer request
Memory address fixed
1 to 65536 transfers
•
Repeat mode
1-byte or 1-word transfer
executed for one transfer request
Memory address incremented/
decremented by 1 or 2
After specified number of
transfers (1 to 256), initial state is
restored and operation continues
Single address mode
•
1-byte or 1-word transfer executed
for one transfer request
•
Transfer in 1 bus cycle using DACK
pin in place of address specifying I/O
•
Specifiable for sequential, idle, and
repeat modes
Transfer Source
•
TPU channel 0 to
5 compare
match/input
capture A interrupt
•
SCI transmit-data-
empty interrupt
•
SCI reception
complete interrupt
•
A/D converter
conversion end
interrupt
•
External request
•
External request
Address Register Bit Length
Source
Destination
24/16
16/24
DACK/24
24/DACK
209
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