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Interrupt Source
TGI3A (GR3A compare match/
input capture)
TGI3B (GR3B compare match/
input capture)
TGI3C (GR3C compare match/
input capture)
TGI3D (GR3D compare match/
input capture)
TGI4A (GR4A compare match/
input capture)
TGI4B (GR4B compare match/
input capture)
TGI5A (GR5A compare match/
input capture)
TGI5B (GR5B compare match/
input capture)
CMIA0 (compare match A0)
CMIB0 (compare match B0)
CMIA1 (compare match A1)
CMIB1 (compare match B1)
DEND0A (channel 0/channel 0A
transfer end)
DEND0B (channel 0B transfer end)
DEND1A (channel 1/channel 1A
transfer end)
DEND1B (channel 1B transfer end)
RXI0 (reception complete 0)
TXI0 (transmit data empty 0)
RXI1 (reception complete 1)
TXI1 (transmit data empty 1)
RXI2 (reception complete 2)
TXI2 (transmit data empty 2)
310
Origin of
Interrupt
Vector
Source
Number
TPU
48
channel 3
49
50
51
TPU
56
channel 4
57
TPU
60
channel 5
61
8-bit timer
64
channel 0
65
8-bit timer
68
channel 1
69
DMAC
72
73
74
75
SCI
81
channel 0
82
SCI
85
channel 1
86
SCI
89
channel 2
90
Vector
Address
DTCE*
H'0460
DTCEC5
H'0462
DTCEC4
H'0464
DTCEC3
H'0466
DTCEC2
H'0470
DTCEC1
H'0472
DTCEC0
H'0478
DTCED5
H'047A
DTCED4
H'0480
DTCED3
H'0482
DTCED2
H'0488
DTCED1
H'048A
DTCED0
H'0490
DTCEE7
H'0492
DTCEE6
H'0494
DTCEE5
H'0496
DTCEE4
H'04A2
DTCEE3
H'04A4
DTCEE2
H'04AA
DTCEE1
H'04AC
DTCEE0
H'04B2
DTCEF7
H'04B4
DTCEF6
Priority
High
Low
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