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Interrupt Source
CMIA0 (compare match A2)
CMIB0 (compare match B2)
OVI0 (overflow 2)
Reserved
CMIA1 (compare match A3)
CMIB1 (compare match B3)
OVI1 (overflow 3)
Reserved
IICI0 (1 byte transmission/reception
completed)
DDCSW1 (format switch)
IICI1 (1 byte transmission/reception
completed)
Reserved
Reserved
Reserved
Reserved
Reserved
ERI3 (reception error 3)
RXI3 (reception completed 3)
TXI3 (transmission data empty 3)
TEI3 (transmission end 3)
ERI4 (reception error 4)
RXI4 (reception completed 4)
TXI4 (transmission data empty 4)
TEI4 (transmission end 4)
Note: * Lower 16 bits of the start address.
104
Origin of
Interrupt
Vector
Source
Number
8 bit timer
92
channel 2
93
94
—
95
8 bit timer
96
channel 3
97
98
—
99
IIC channel
100
0 (optional)
101
IIC channel
102
1 (optional)
103
—
104
105
106
107
—
108
109
110
111
—
112
113
114
115
—
116
117
118
119
SCI
120
channel 3
121
122
123
SCI
124
channel 4
125
126
127
Vector
Address*
Advanced
Mode
IPR
H'0170
IPRL6 to 4
H'0174
H'0178
H'017C
H'0180
H'0184
H'0188
H'018C
H'0190
IPRL2 to 0
H'0194
H'0198
H'019C
H'01A0
IPRM6 to 4
H'01A4
H'01A8
H'01AC
H'01B0
IPRM2 to 0
H'01B4
H'01B8
H'01BC
H'01C0
IPRN6 to 4
H'01C4
H'01C8
H'01CC
H'01D0
IPRN2 to 0
H'01D4
H'01D8
H'01DC
H'01E0
IPRO6 to 4
H'01E4
H'01E8
H'01EC
H'01F0
IPRO2 to 0
H'01F4
H'01F8
H'01FC
Priority
High
Low
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