Hitachi H8S/2633 Hardware Manual page 910

ø
A23 to A0
CS7 to CS0
AS
RD
(read)
D15 to D0
(read)
WR
(write)
D15 to D0
(write)
WAIT
Figure 25-8 Basic Bus Timing (Three-State Access with One Wait State)
T T
1 2
t t
WTS WTH
T
W
t t
WTS WTH
T
3
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