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7.2.9
Refresh Timer Counter (RTCNT)
Bit
:
Initial value
:
R/W
:
R/W
RTCNT is an 8-bit read/write up-counter.
RTCNT counts up using the internal clock selected by the DRAMCR CKS2 to CKS0 bits.
When RTCNT matches the value in RTCOR (compare match), the DRAMCR CMF flag is set to 1
and RTCNT is cleared to H'00. If, at this point, DRAMCR RFSHE is set to 1, the refresh cycle
starts. When the DRAMCR CMIE bit is set to 1, a compare match interrupt (CMI) is also
generated.
RTCNT is initialized to H'00 at a power-on reset and in hardware standby mode. It is not
initialized at a manual reset or in software standby mode.
7.2.10
Refresh Time Constant Register (RTCOR)
Bit
:
Initial value
:
R/W
R/W
:
RTCOR is an 8-bit read/write register that sets theRTCNT compare match cycle.
The values of RTCOR and RTCNT are constantly compared and, when both value match, the
DRAMCR CMF flag is set to 1 and RTCNT is cleared to H'00.
RTCOR is initialized to H'FF at a power-on reset and in hardware standby mode. It is not
initialized at a manual reset or in software standby mode.
7
6
0
0
R/W
R/W
7
6
1
1
R/W
R/W
5
4
0
0
R/W
R/W
5
4
1
1
R/W
R/W
3
2
0
0
R/W
R/W
3
2
1
1
R/W
R/W
1
0
0
0
R/W
1
0
1
1
R/W
153
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