Hitachi H8S/2633 Hardware Manual page 344

ø
DTC activation
request
DTC
request
Address
Figure 9-12 DTC Operation Timing (Example of Chain Transfer)
9.3.10 Number of DTC Execution States
Table 9-8 lists execution statuses for a single DTC data transfer, and table 9-9 shows the number
of states required for each execution status.
Table 9-8 DTC Execution Statuses
Vector Read
Mode I
Normal 1
Repeat 1
Block transfer 1
Vector read
Transfer
information
read
Register Information
Read/Write
J
6
6
6
Data transfer
Read Write
Transfer
information
write
Data Read
K
1
1
N
N: Block size (initial setting of CRAH and CRAL)
Data transfer
Read Write
Transfer Transfer
information information
read
Internal
Data Write Operations
L M
1 3
1 3
N 3
write
319