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Port B Data Register (PBDR)
Bit
:
PB7DR
Initial value :
R/W
:
R/W
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0). PBDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains
its prior state by a manual reset or in software standby mode.
Port B Register (PORTB)
Bit
:
PB7
Initial value :
R/W
:
Note: * Determined by state of pins PB7 to PB0.
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB7 to PB0) must always be performed on PBDR.
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTB contents are determined by the pin
states, as PBDDR and PBDR are initialized. PORTB retains its prior state in software standby
mode.
7
6
PB6DR
PB5DR
0
0
R/W
7
6
PB6
—*
—*
R
R
5
4
PB4DR
PB3DR
0
0
R/W
R/W
5
4
PB5
PB4
—*
—*
R
R
3
2
PB2DR
PB1DR
0
0
R/W
R/W
3
2
PB3
PB2
—*
—*
R
R
1
0
PB0DR
0
0
R/W
R/W
1
0
PB1
PB0
—*
—*
R
R
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