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Hitachi H8S/2633 Hardware Manual page 793

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21.1
Overview
The H8S/2633 has 16 kbytes of on-chip high-speed static RAM, the H8S/2632 has 12 kbytes, and
the H8S/2631 has 8 kbytes. The RAM is connected to the CPU by a 16-bit data bus, enabling one-
state access by the CPU to both byte data and word data. This makes it possible to perform fast
word data transfer.
The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the
system control register (SYSCR).
21.1.1
Block Diagram
Figure 21-1 shows a block diagram of the on-chip RAM.
Figure 21-1 Block Diagram of RAM (H8S/2633 Series)
Section 21 RAM
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'FFB000
H'FFB002
H'FFB004
H'FFEFBE
H'FFFFC0
H'FFFFFE
H'FFB001
H'FFB003
H'FFB005
H'FFEFBF
H'FFFFC1
H'FFFFFF
777

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