Download Print this page

Hitachi H8S/2633 Hardware Manual page 525

Advertisement

Address H'FE2D
Bit
:
NDR7
Initial value :
R/W
:
R/W
Address H'FE2F
Bit
:
Initial value :
R/W
:
12.2.5
PPG Output Control Register (PCR)
Bit
:
G3CMS1 G3CMS0 G2CMS1 G2CMS0 G1CMS1 G1CMS0 G0CMS1 G0CMS0
Initial value :
R/W
:
R/W
PCR is an 8-bit readable/writable register that selects output trigger signals for PPG outputs on a
group-by-group basis.
PCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 and 6—Group 3 Compare Match Select 1 and 0 (G3CMS1, G3CMS0): These bits
select the compare match that triggers pulse output group 3 (pins PO15 to PO12).
Bit 7
Bit 6
G3CMS1
G3CMS0
0
0
1
1
0
1
7
6
NDR6
NDR5
0
0
R/W
7
6
1
1
7
6
1
1
R/W
Description
Output Trigger for Pulse Output Group 3
Compare match in TPU channel 0
Compare match in TPU channel 1
Compare match in TPU channel 2
Compare match in TPU channel 3
5
4
NDR4
0
0
R/W
R/W
5
4
1
1
5
4
1
1
R/W
R/W
3
2
1
1
3
2
NDR3
NDR2
0
0
R/W
R/W
3
2
1
1
R/W
R/W
1
0
1
1
1
0
NDR1
NDR0
0
0
R/W
R/W
1
0
1
1
R/W
R/W
(Initial value)
503

Advertisement

loading

This manual is also suitable for:

Hd6432633Hd6432631Hd64f2633H8s/2632Hd6432632H8s/2631