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Hitachi H8S/2633 Hardware Manual page 353

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Port
Description
Port 7 • 8-bit I/O
port
Port 9 • 8-bit input
port
Port A • 4-bit I/O
port
• Built-in
MOS input
pull-up
• Open-drain
output
capability
Pins
P77/TxD3
P76/RxD3
P75/TMO3/SCK3
P74/TMO2/MRES
P73/TMO1/TEND1/
CS7
P72/TMO0/TEND0/
CS6/SYNCI
P71/TMRI23/TMCI23/
DREQ1/CS5
P70/TMRI01/TMCI01/
DREQ0/CS4
P97/AN15/DA3
P96/AN14/DA2
P95/AN13
P94/AN12
P93/AN11
P92/AN10
P91/AN9
P90/AN8
PA3/A19/SCK2
PA2/A18/RxD2
PA1/A17/TxD2
PA0/A16
Mode 4
Mode 5
8-bit I/O port also functioning as 8-bit timer I/O
pins (TMRI01, TMCI01, TMRI23, TMCI23,
TMO0, TMO1, TMO2, TMO3), DMAC I/O pins
(DREQ0, TEND0, DREQ1, TEND1), bus
control output pins (CS4 to CS7), the IIC input
pin (SYNCI), SCI I/O pins (SCK3, RxD3,
TxD3), and the manual reset input pin (MRES)
8-bit input port also functioning as A/D converter analog inputs
(AN15 to AN8) and D/A converter analog outputs (DA3, DA2)
4-bit I/O port also functioning as SCI (channel
2) I/O pins (TxD2, RxD2, SCK2) and address
outputs (A19 to A16)
Mode 6
Mode 7
8-bit I/O port
also function-
ing as 8-bit
timer I/O pins
(TMRI01,
TMCI01,
TMRI23,
TMCI23,
TMO0, TMO1,
TMO2, TMO3),
DMAC I/O pins
(DREQ0,
TEND0,
DREQ1,
TEND1), the
IIC input pin
(SYNCI), SCI
I/O pins
(SCK3, RxD3,
TxD3), and the
manual reset
input pin
(MRES)
4-bit I/O port
also function-
ing as SCI
(channel 2)
I/O pins (TxD2,
RxD2, SCK2)
329

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