Hitachi H8S/2633 Hardware Manual page 1006

Instruction H
ROTXL —
ROTXR —
RTE
RTS — — — — —
SHAL —
SHAR —
SHLL —
SHLR — 0
SLEEP — — — — —
STC — — — — —
STM — — — — —
STMAC —
994
N Z V C Definition
0 N = Rm
Z = Rm · Rm–1 · ...... · R0
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
0 N = Rm
Z = Rm · Rm–1 · ...... · R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
Stores the corresponding bits of the result.
N = Rm
Z = Rm · Rm–1 · ...... · R0
V = Dm · Dm–1 + Dm · Dm–1 (1-bit shift)
V = Dm · Dm–1 · Dm–2 · Dm · Dm–1 · Dm–2 (2-bit shift)
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
0 N = Rm
Z = Rm · Rm–1 · ...... · R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
0 N = Rm
Z = Rm · Rm–1 · ...... · R0
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
0 N = Rm
Z = Rm · Rm–1 · ...... · R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
— N = 1 if MAC instruction resulted in negative value in MAC
register
Z = 1 if MAC instruction resulted in zero value in MAC
register
V = 1 if MAC instruction resulted in overflow