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25.3.3
Bus Timing
Table 25-7 lists the bus timing.
Table 25-7 Bus Timing
Condition A: V
CC
V
= 3.3 V to AV
ref
(regular specifications), T
Condition B: V
CC
V
= 3.3 V to AV
ref
(regular specifications), T
Item
Address delay time
Address setup time
Address hold time
CS delay time 1
CS delay time 2
AS delay time
RD delay time 1
RD delay time 2
Read data setup
time
Read data hold
time
Read data access
time1
Read data access
time2
Read data access
time3
Read data access
time 4
= PLLV
= 3.0 V to 3.6 V, PV
CC
, V
CC
SS
= PLLV
= 3.0 V to 3.6 V, PV
CC
, V
CC
SS
Condition A
Symbol
Min
t
—
AD
0.5 ×
t
AS
t
– 30
cyc
0.5 ×
t
AH
t
– 20
cyc
t
—
CSD1
t
—
CSD2
t
—
ASD
t
—
RSD1
t
—
RSD2
t
30
RDS
t
0
RDH
t
—
ACC1
t
—
ACC2
t
—
ACC3
t
—
ACC4
= 3.0 V to 5.5 V, AV
CC
= AV
= 0 V, ø = 2 to 16 MHz, T
SS
= –40°C to +85°C (wide-range specifications)
a
= 4.5 V to 5.5 V, AV
CC
= AV
= 0 V, ø = 2 to 25 MHz, T
SS
= –40°C to +85°C (wide-range specifications)
a
Condition B
Max
Min
30
—
0.5 ×
—
t
– 15
cyc
0.5 ×
—
t
– 8
cyc
30
—
30
—
30
—
30
—
30
—
—
15
—
0
1.0 ×
—
t
– 35
cyc
1.5 ×
—
t
– 35
cyc
2.0 ×
—
t
– 35
cyc
2.5 ×
—
t
– 35
cyc
= 3.3 V to 5.5 V,
CC
= –20°C to +75°C
a
= 3.3 V to 5.5 V,
CC
= –20°C to +75°C
a
Max
Unit
Test Conditions
20
ns
Figure 25-6 to
—
ns
Figure 25-11
—
ns
20
ns
18
ns
18
ns
18
ns
18
ns
—
ns
—
ns
1.0 ×
ns
t
– 25
cyc
1.5 ×
ns
t
– 25
cyc
2.0 ×
ns
t
– 25
cyc
2.5 ×
ns
t
– 25
cyc
893
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