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CHAPTER 28 3M-BIT FLASH MEMORY
28.1
Overview of 3M-bit Flash Memory
The 3M-bit flash memory is mapped to the F8/F9 to FF bank in the CPU memory map.
The functions of the flash memory interface circuit enable read-access and program-
access from the CPU in the same way as mask ROM. Instructions from the CPU can be
used via the flash memory interface circuit to write data to and erase data from the flash
memory. Internal CPU control therefore enables rewriting of the flash memory while it is
mounted. As a result, improvements in programs and data can be performed efficiently.
■ 3M-bit Flash Memory Features
•
Use of automatic program algorithm (Embedded Algorithm
•
Erase pause/restart functions provided
•
Detection of completion of writing/erasing using data polling or toggle bit functions
•
Detection of completion of writing/erasing using CPU interrupts
•
Sector erase function (any combination of sectors)
•
Minimum of 10,000 write/erase operations
*: Embedded Algorithm is a trademark of Advanced Micro Device, Inc.
Note:
The manufacturer code and device code do not have the reading function. These codes cannot be
accessed by the command.
■ Writing to/Erasing Flash Memory
The flash memory cannot be written to and read at the same time. That is, when data is written to or erased
data from the flash memory, the program in the flash memory must first be copied to RAM. The entire
process is then executed in RAM so that data is simply written to the flash memory. This eliminates the
need for the program to access the flash memory from the flash memory itself.
■ Flash Memory Control Status Register (FMCS)
Address: 0000AE
H
556
7
6
bit
INTE
RDYINT
WE
(R/W)
(R/W)
(R/W)
5
4
3
RDY
Reserved
Reserved
(R)
(R/W)
TM
*: Equivalent to MBM29LV200)
2
1
0
Reserved
Reserved
(R/W)
(R/W)
(R/W)
Initial value
000X0000
B
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