Fujitsu MB90390 Series Hardware Manual page 279

Peripheral clock 16-division
Peripheral clock 8-division
Peripheral clock 4-division
Peripheral clock 2-division
Peripheral clock
ch.0 borrow
Time-base counter output,
512-division of main clock
"L"/"H" selection
Figure 16.2-2 8/16-bit PPG ch.1 Block Diagram
PPG10
Output latch
Invert
PCNT
(down counter)
Reload
"L"/"H" selector
PRLL1
(Temporary buffer)
PRLH1
PPG10 output enable
Clear
PEN1
In MB90390 series, this IRQ signal merged
with the Channel0 IRQ signal by OR logic.
S
R Q
PRLBH1
PIE1
PUF1
PPGC1
(Operation mode control)
CHAPTER 16 8/16-BIT PPG
PPG10
IRQ
"L" data bus
"H" data bus
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