CHAPTER 13 16-BIT I/O TIMER
13.1
Outline of 16-Bit I/O Timer
The MB90390 Series contains two 16-bit free-run timer modules, four output compare
modules, and three input capture modules and supports six input channels and eight
output channels. The following sections describe the 16-bit free-run timer, Output
Compare and Input Capture.
■ 16-bit Free-run Timer
The two 16-bit free-run timers consist of a 16-bit up counter, control register, and prescaler each. The
values output from this timers counter are used as the base timer for input capture and output compare.
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Eight counter clocks are available.
Internal clock: φ, φ/2, φ /4, φ/8, φ/16, φ/32, φ/64, φ/128 (φ is machine clock)
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An interrupt can be generated upon a counter overflow or a match with compare register 0 and 1.
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The counter value can be initialized to "0000
register 0 for timer 0, resp. compare register 4 for timer 1.
■ Output Compare (2 Channels Per One Module)
The four output compare modules consist of two 16-bit compare registers, compare output latch, and
control register each.
Output Compare 0 and 1 (channels OUT0, OUT1, OUT2 and OUT3) are assigned to Free-run Timer 0 and
Output Compare 2 and 3 (channels OUT4, OUT5, OUT6 and OUT7) are assigned to Free-run Timer 1.
When a 16-bit free-run timer value matches the corresponding compare register value, the output level is
reversed and an interrupt can be issued.
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The two compare registers can be used independently for each Output Compare.
Output pins and interrupt flags corresponding to compare registers
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Output pins can be controlled based on pairs of the two compare registers.
Output pins can be reversed by using the two compare registers.
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Initial values for output pins can be set.
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Interrupts can be generated upon a compare match.
192
" upon a reset, software clear, or match with compare
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