Ppg0/1 Clock Select Register (Ppg01) - Fujitsu MB90390 Series Hardware Manual

16.3.3

PPG0/1 Clock Select Register (PPG01)

The PPG0/1 Clock Select Register (PPG01) is an 8-bit control register that controls the
counter clock of the 8/16-bit PPG.
■ PPG0/1 Clock Select Register (PPG01)
Figure 16.3-3 Configuration of the PPG0/1 Clock Select Register (PPG01)
PPG0/1 Clock Select Registers
Address:
bit
ch.01 00003A
H PCS2
Other ch.:
(R/W)
ch.23 00003E
H
ch.45 000042
H
ch.67 000046
H
ch.89 00004A
H
ch.AB 00004E
H
R/W : Readable and writable
:
X Undefined value
- : Undefined
: Initial value
7 6 5 4 3
PCS1 PCS0 PCM2 PCM1
(R/W) (R/W) (R/W) (R/W)
PPG01
2 1 0
PCM0 - -
Initial value
0 0 0 0 0 0 X X
(R/W) (-) (-)
bit 4 bit 3
PCM2 PCM1
0 0
0 0
0 1
0 1
1 0
1 1
bit 7 bit 6
PCS2 PCS1
0 0
0 0
0 1
0 1
1 0
1 1
CHAPTER 16 8/16-BIT PPG
B
bit 2
PCM0 Count clock selection bit (ch.0)
0 Peripheral Clock
1 Peripheral Clock/2
0 Peripheral Clock/4
1 Peripheral Clock/8
0 Peripheral Clock/16
1 Clock input from time-base timer
bit 5
PCS0 Count clock selection bit (ch.1)
0 Peripheral Clock
1 Peripheral Clock/2
0 Peripheral Clock/4
1 Peripheral Clock/8
0 Peripheral Clock/16
1 Clock input from time-base timer
259