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23.6.6
Message Buffer Valid Register (BVALR)
Message buffer valid register (BVALR) stores the validity of the message buffers or
displays their state.
■ Message Buffer Valid Register (BVALR)
Figure 23.6-9 Configuration of the Message Buffer Valid Register (BVALR)
Address:
CAN0: 000071
CAN1: 000081
CAN2: 003571
CAN3: 003581
CAN4: 003591
Address:
CAN0: 000070
CAN1: 000080
CAN2: 003570
CAN3: 003580
CAN4: 003590
[bit15 to bit0] BVAL15 to BVAL0:
"0": Message buffer (x) invalid
"1": Message buffer (x) valid
If the message buffer (x) is set to invalid, it will not transmit or receive messages.
If the buffer is set to invalid during transmission operating, it becomes invalid (BVALx = 0) after the
transmission is completed or terminated by an error.
If the buffer is set to invalid during reception operating, it immediately becomes invalid (BVALx = 0). If
received messages are stored in a message buffer (x), the message buffer (x) is invalid after storing the
messages.
Notes:
• x indicates a message buffer number (x = 0 to 15).
• When invaliding a message buffer (x) by writing "0" to a bit (BVALx), execution of a bit
manipulation instruction is prohibited until the bit is set to "0".
• To invalidate the message buffer (by setting the BVALR: BVAL bit to "0") while the CAN controller
is operating for CAN communication (the read value of the CSR: HALT bit is "0" and the CAN
controller is operating for CAN bus communication to enable transmission and reception), follow
the procedure in Section "23.16 Precautions when Using CAN Controller".
bit
15
14
13
12
11
H
BVAL15 BVAL14 BVAL13 BVAL12 BVAL11 BVAL10 BVAL9 BVAL8
H
H
R/W R/W R/W R/W
R/W
H
H
bit
7
6
5
4
3
H
BVAL7 BVAL6 BVAL5 BVAL4 BVAL3 BVAL2 BVAL1 BVAL0
H
H
R/W R/W R/W R/W
R/W
H
H
CHAPTER 23 CAN CONTROLLER
10
9
8
BVALRn (upper)
Initial value
0 0 0 0 0 0 0 0
R/W
R/W R/W
2
1
0
BVALRn (lower)
Initial value
0 0 0 0 0 0 0 0
R/W
R/W R/W
B
B
n = 0, 1, 2, 3, 4
479
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