Accumulator (A) - Fujitsu MB90390 Series Hardware Manual

2.7.1

Accumulator (A)

The accumulator (A) register consists of two 16-bit arithmetic operation registers (AH
and AL), and is used as a temporary storage for operation results and transfer data.
■ Accumulator (A)
The A register consists of two 16-bit arithmetic operation registers (AH and AL). The A register is used as
a temporary storage for operation results and transfer data. During 32-bit data processing, AH and AL are
used together. Only AL is used for word processing in 16-bit data processing mode or for byte processing
in 8-bit data processing mode (see Figure 2.7-3 and Figure 2.7-4). The data stored in the A register can be
operated upon with the data in memory or registers (Ri, RWi, or RLi). In the same manner as with the
2
F MC-8L, when a word or shorter data item is transferred to AL, the previous data item in AL is
automatically sent to AH (data preservation function). The data preservation function and operation
between AL and AH help improve processing efficiency.
When a byte or shorter data item is transferred to AL, the data is sign-extended or zero-extended and stored
as a 16-bit data item in AL. The data in AL can be handled either as word or byte long.
When a byte-processing arithmetic operation instruction is executed on AL, the high-order eight bits of AL
before operation are ignored. The high-order eight bits of the operation result all become zeroes.
The A register is not initialized by a reset. The A register holds an undefined value immediately after a
reset.
MOVL A,@R W1+6
Old A
XXXX H
New A
Old A
New A
Figure 2.7-3 32-bit Data Transfer
XXXX H
A6 H
DTB
8F74 H 2B52 H
AH AL
Figure 2.7-4 AL-AH Transfer
MOVW A,@R W1+6
XXXX H
1234 H
A6 H
DTB
1234 H 1234 H
MSB
A61540 H
8F H
A6153E H 2B H
+6
RW1 15 H
MSB
A61540 H
8F H
2B H
A6153E H
+6
15 H
RW1
CHAPTER 2 CPU
LSB
74 H
52 H
38 H
LSB
74 H
52 H
38 H
39