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CHAPTER 7 RESETS
7.1
Resets
If a reset is generated, the CPU immediately stops the current execution process and
waits for the reset to be cleared. The CPU then begins processing at the address
indicated by the reset vector.
The four causes of a reset are as follows
• Power-on reset
• Watchdog timer overflow
• External reset request via the RST pin
• Software reset request
■ Causes of a Reset
Table 7.1-1 lists the causes of a reset.
Table 7.1-1 Causes of a Reset
Type of reset
Power-on
External pin
Software
Watchdog timer
Main clock: Oscillation clock frequency divided by 2
126
Cause
When the power is turned on
"L" level input to RST pin
A "0" is written to the RST
bit of the low-power
consumption mode control
register (LPMCR).
Watchdog timer overflow
Watchdog
Machine clock
timer
Main clock
Stop
(MCLK)
Main clock
Stop
(MCLK)
Main clock
Stop
(MCLK)
Main clock
Stop
(MCLK)
Oscillation
stabilization
wait
Yes
No
No
No
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