Table of Contents
Advertisement
19.9.4
Status Flag During Transmit and Receive Operation
RBF is set when the start bit is detected and cleared when a stop bit is detected. The
receive data in UIDR at the RBF clear timing is not yet valid. The data in UIDR becomes
valid at the RDRF set timing.
■ Status Flag During Transmit and Receive Operation
Figure 19.9-7 shows the RBF set timing (Mode 0).
SIN0 input
RBF
RDRF, PE, ORFE
Writing the transmission data to UODR0 sets TBF. TBF is cleared when transmission completes.
UODR write
SOT0 output
TBF
Note:
Receive operation starts after releasing a reset unless the SIN input pin is fixed at "1". Therefore,
before setting the mode, write "0" to RFC in the UMC register to clear any receive flags that have
been set.
Set the communication mode when the RBF and TBF flags in the USR register are "0". The data
transmitted and received during mode setting cannot be guaranteed.
2
■ EI
OS (Extended Intelligent I/O Service)
See the Section "3.7 Extended Intelligent I/O Service (EI2OS)" for details on EI
Figure 19.9-7 RBF Set Timing (Mode 0)
ST D0 D1
ST: Start bit
D0 to D7: Data bits
Figure 19.9-8 TBF Set Timing (Mode 0)
ST D0 D1
ST: Start bit
D0 to D7: Data bits
D2 D3 D4
D5 D6 D7
SP: Stop bit
D2 D3 D4
D5 D6 D7
SP: Stop bit
CHAPTER 19 UART0, UART1
SP
SP SP
2
OS.
333
Advertisement
Table of Contents
