Clock Selection Registers - Fujitsu MB90390 Series Hardware Manual

5.3

Clock Selection Registers

This section lists the clock selection registers and describes the function of each
register in detail.
■ Clock Selection Registers
Figure 5.3-1 shows the clock selection register.
bit
Address:
0 0 0 0 A 1
Reserved
H
bit
Address:
0 0 3 5 C F
Reserved
H
: Readable and Writable
R/W
: Write only
W
: Read only
R
X : Undefined value
-
: Undefined
Figure 5.3-1 Clock Selection Registers
15 14 13 12
MCM WS1 WS0
Reserved
R/W R R/W R/W R/W
15 14 13 12
Reserved Reserved Reserved
Reserved
- -
- -
11 10 9 8
MCS CS1 CS0
R/W R/W R/W
11 10 9 8
CS2
Reserved Reserved
W W W W
CHAPTER 5 CLOCKS
Initial value
(CKSCR)
1 1 1 1 1 1 0 0
Initial value
(PSCCR)
X X X X 0 0 0 0
B
B
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