Fujitsu MB90390 Series Hardware Manual page 172

CHAPTER 8 LOW-POWER CONTROL CIRCUIT
Table 8.3-1 Function Description of Each Bit of the Low-power Consumption Mode Control Register
(LPMCR)
Bit name
STP:
bit7
Stop mode bit
SLP:
bit6
Sleep mode bit
SPL:
Pin state setting bit
bit5
(for time-base timer
mode and stop mode)
RST:
bit4 Internal reset signal
generation bit
TMD:
bit3 Time-base timer
mode bit
CG1, CG0:
bit2 Bits for selecting
bit1 clock count for CPU
temporary halt cycle
bit0 Reserved
144
• This bit indicates switching to the stop mode.
• When "1" is written to this bit, a switch to the stop mode is performed.
• Writing "0" in this bit has no effect on operation.
• This bit is cleared to "0" by a reset or when an interrupt request occurs.
• The read value of this bit is always "0".
• This bit indicates switching to a sleep mode.
• When "1" is written to this bit, a switch to a sleep mode is performed.
• Writing "0" in this bit has no effect on operation.
• This bit is cleared to "0" by a reset or when an interrupt request occurs.
• The read value of this bit is always "0".
• This bit is enabled only in the time-base timer mode and stop mode.
• When this bit is "0", the level of the external pins is retained.
• When this bit is "1", the status of the external pins changes to high-impedance.
• This bit is initialized to "0" by a reset.
• When "0" is written to this bit, an internal reset signal of three machine cycles is
generated.
• Writing "1" in this bit has no effect on operation.
• The read value of this bit is always "1".
• This bit indicates switching to the time-base timer mode.
• When "0" is written to this bit in the main clock mode or PLL clock mode, a switch to
time-base timer mode is performed.
• This bit is cleared to "1" by a reset or when an interrupt request occurs.
• The read value of this bit is always "1".
• These bits set the number of CPU clock pulses per cycle to halt the CPU for the CPU
intermittent operation function.
• The clock supplied to the CPU is stopped for the specified number of pulses after the
execution of each instruction.
• Four types of clock counts are selectable.
• These bits are initialized to "00
• Always write "0" to this bit.
Function
" by a reset.
B