Fujitsu MB90390 Series Hardware Manual page 412

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CHAPTER 20 UART2, UART3
Error detection
In mode 0, parity, overrun, and frame errors can be detected. In mode 1, overrun and frame errors can be
detected; parity errors cannot be detected though.
Parity
The addition and detection of a parity bit can be set (for transmission and reception, respectively). Use the
parity enable bit (SCR2/SCR3:PEN) to enable or disable parity and the parity selection bit (SCR2/SCR3:P)
to select even or odd parity. Parity cannot be used in operation mode 1.
SIN
SOT
SOT
ST: Start bit SP: Stop bit Parity enabled (PEN=1)
Note: Parity cannot be used in operation mode 1.
Data signaling method
NRZ data format.
Data transfer method
LSB-first or MSB-first mode can be selected as the data bit transfer method.
384
Figure 20.7-2 Data Transmitted with Parity Enabled
ST
1 0 1 1
0
0
ST
1 0 1 1
0
0
ST
1 0 1 1
0
0
Data
Parity error during
SP
reception with even parity
(SCR2/SCR3: P=0)
0 0 0
Transmission of even parity
(SCR2/SCR3: P=0)
SP
0 0 1
Transmission of odd parity
(SCR2/SCR3: P=1)
SP
0 0 0
Parity

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