Fujitsu MB90390 Series Hardware Manual page 415

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Error detection
If no start/stop bits are selected (ECCR2/ECCR3: SSM = 0) only overrun errors are detected.
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Communication
For initialization of the synchronous mode, following settings have to be done:
Baud rate generator registers (BGR02/BGR03 and BGR12/BGR13):
Set the desired reload value for the dedicated baud rate reload counter.
Serial mode control register (SMR2/SMR3):
MD1, MD0: "10
SCKE:
SOE:
Serial control register (SCR2/SCR3):
RXE, TXE: set one or both of these flags to "1"
A/D:
CL:
CRE:
-- when SSM=0 (default):
PEN, P, SBL: don't care
-- when SSM=1:
PEN: "1" if parity bit is added/detected, "0" if not
P:
SBL:
Serial status register (SSR2/SSR3):
BDS:
RIE:
TIE:
Extended communication control register (ECCR2/ECCR3):
SSM: "0" if no start/stop bits are desired (normal); "1" for adding start/stop bits (extended function)
MS:
Note:
To start the communication, write the data into the transmission data resister (TDR2/TDR3).
If you just want to receive the data, disable the serial output (SMR2/SMR3: SOE = 0) and write a
dummy data to TDR2/TDR3.
Allowing the continuous clock and start/stop bits will enable a bidirectional communication like the
asynchronous mode.
" (Mode 2)
B
"1" for the dedicated Baud Rate Reload Counter
"0" for external clock input
"1" for transmission and reception
"0" for reception only
no Address/Data selection - don't care
automatically fixed to 8-bit data - don't care
"1" to clear error flags and suspend reception.
"1" for even parity, "0" odd parity
"1" for 2 stop bits, "0" for 1 stop bit.
"0" for LSB first, "1" for MSB first
"1" if interrupts are used; "0" reception interrupts are disabled.
"1" if interrupts are used; "0" transmission interrupts are disabled.
"0" for master mode (UART2, UART3 generates the serial clock); "1" for slave mode (UART2,
UART3 receives serial clock from the master device)
CHAPTER 20 UART2, UART3
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