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23.6.19
Acceptance Mask Registers 0 and 1 (AMR0 and AMR1)
There are two acceptance mask registers, AMR0 and AMR1, both of which are available
either in the standard frame format or extended frame format.
AM28 to AM18 (11 bits) are used for acceptance masks in the standard frame format and
AM28 to AM0 (29 bits) are used for acceptance masks in the extended format.
■ Acceptance Mask Registers 0 and 1 (AMR0 and AMR1)
Figure 23.6-22 Configuration of the Acceptance Mask Register 0 (AMR0)
Address:
CAN0: 003714
CAN1: 003914
CAN2: 003B14
CAN3: 003D14
CAN4: 003F14
Address:
CAN0: 003715
CAN1: 003915
CAN2: 003B15
CAN3: 003D15
CAN4: 003F15
Address:
CAN0: 003716
CAN1: 003916
CAN2: 003B16
CAN3: 003D16
CAN4: 003F16
Address:
CAN0: 003717
CAN1: 003917
CAN2: 003B17
CAN3: 003D17
CAN4: 003F17
R/W
:
Readable and writable
X
:
Undefined value
-
:
Undefined
bit
7
6
5
4
3
H
AM28 AM27 AM26 AM25 AM24 AM23 AM22 AM21
H
H
R/W R/W R/W R/W
R/W
H
H
15
14
13
12
11
bit
H
AM20 AM19 AM18
AM17 AM16 AM15 AM14 AM13
H
H
R/W R/W R/W R/W
R/W
H
H
7
6
5
4
3
bit
H
AM12 AM11 AM10 AM9 AM8 AM7 AM6 AM5
H
H
R/W R/W R/W R/W
R/W
H
H
15
14
13
12
11
bit
H
AM4 AM3 AM2 AM1 AM0
H
H
R/W R/W R/W R/W
R/W
H
H
CHAPTER 23 CAN CONTROLLER
2
1
0
AMR0n Byte 0
Initial value
X X X X X X X X
R/W
R/W R/W
10
9
8
AMR0n Byte 1
Initial value
X X X X X X X X
R/W
R/W R/W
2
1
0
AMR0n Byte 2
Initial value
X X X X X X X X
R/W
R/W R/W
10
9
8
AMR0n Byte 3
-
-
-
Initial value
X X X X X X X X
-
-
-
n = 0, 1, 2, 3, 4
B
B
B
B
493
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