Input Data Register (Uidr) And Output Data Register (Uodr) - Fujitsu MB90390 Series Hardware Manual

19.3.3 Input Data Register (UIDR) and Output Data Register
(UODR)
UIDR (input data register) is the serial data input register. UODR (output data register) is
the serial data output register.
The most significant two bits (D7 and D6) are ignored if the data length is 6 bits and the
most significant bit (D7) is ignored if the data length is 7 bits. Write to UODR only when
TDRE = 1 in the USR register. Read UIDR only when RDRF = 1 in the USR register.

■ Input Data Register (UIDR) and Output Data Register (UODR)

Figure 19.3-3 Input Data Register (UIDR) and Output Data Register (UODR)
Address:
bit
ch.0 000022
H
ch.1 000026
H
R/W :
7 6 5 4 3 2
R/W R/W R/W R/W R/W R/W
Readable and writable
1 0
Initial value
R/W R/W X X X X X X X X
bit 7 to bit 0
Read/Write
Read Read from Input Data Register
Write Write to Output Data Register
CHAPTER 19 UART0, UART1
B
Data Registers
319