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CHAPTER 16 8/16-BIT PPG
●
Details of pins in block diagram
Table 16.2-1 lists the actual pin names and interrupt request numbers of the 8-/16-bit PPG timer.
Table 16.2-1 Pins and Interrupt Request Numbers in Block Diagram
●
PPG operation mode control register 0 (PPGC0)
This register enables or disables operation of the 8-/16-bit PPG timer 0, the pin output, and an underflow
interrupt. It also indicates the occurrence of an underflow.
●
PPG0/1 count clock select register (PPG01)
This register sets the count clock of the 8-/16-bit PPG timer 0.
●
PPG0 reload registers (PRLH0 and PRLL0)
These registers set the High width or Low width of the output pulse. The value set in these registers are
reloaded to the PPG0 down counter (PCNT0) when the 8-/16-bit PPG timer 0 is started.
●
PPG0 down counter (PCNT0)
This counter is an 8-bit down counter that alternately reloads the values set in the PPG0 reload registers
(PRLH0 and PRLL0) to decrement. When an underflow occurs, the pin output is inverted. This counter is
concatenated for use as a single-channel 16-bit PPG down counter.
●
PPG0 temporary buffer (PRLBH0)
This buffer prevents deviation of the output pulse width caused at writing to the PPG reload registers
(PRLH0 and PRLL0). This buffer stores the PRLH0 values temporarily and enables it in synchronization
with the timing of writing to the PRLL0.
252
Channel
PPG0
PPG1
PPG2
PPG3
PPG4
PPG5
PPG6
PPG7
PPG8
PPG9
PPGA
PPGB
Output Pin
P56/PPG00
P50/PPG10
P57/PPG01
P51/PPG11
PB0/PPG02
P52/PPG12
PB1/PPG03
P53/PPG13
PB2/PPG04
P54/PPG14
PB3/PPG05
P55/PPG15
Interrupt Request Number
#17 (11
)
H
#18 (12
)
H
#19 (13
)
H
#20 (14
)
H
#21 (15
)
H
#22 (16
)
H
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