Fujitsu MB90390 Series Hardware Manual page 313

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■ Analog Input Enable Registers
Figure 18.3-1 shows the analog input enable registers (ADER1/ADER0).
Address:
bit
00000D
H
00000C
H
Initial value:
Note:
If bit15 (ADSEL) is set to "0" the pins AN0 to AN7 (Port P60 to P67) are selected as inputs for the A/D
Converter. If this bit is set to "1" the pins AN8 to AN14 (Port PB0 to PB6) are selected as inputs for
the A/D Converter.
■ Block Diagram of the 8/10-bit A/D Converter Pins
Figure 18.3-2 Block Diagram of the P60/AN0 to P67/AN7 and PB0/AN8 to PB6/AN14 Pins
Notes:
• To use a pin as an input port, set the corresponding bit of the DDR6 / DDRB register to "0", and
handle it as normal digital input. Set the corresponding bit of the ADER register to "0".
• To use the pin as an analog input pin, set the corresponding bit of the ADER register to "1". The
value read from the PDR6 / PDRB register is "0".
Figure 18.3-1 Analog Input Enable Registers (ADER1/ADER0)
15
14
13
12
11
10
ADSEL ADE14 ADE13 ADE12 ADE11 ADE10 ADE9 ADE8
R/W
R/W R/W
R/W
R/W
R/W
0
1
1
1
1
ADER
PDR read
Output latch
PDR
PDR write
(Port data register)
Direction latch
DDR write
DDR
DDR read
(Port direction register)
CHAPTER 18 8/10-BIT A/D CONVERTER
9
8
7
6
5
ADE7 ADE6 ADE5 ADE4 ADE3 ADE2 ADE1 ADE0
R/W
R/W
R/W
R/W R/W
1
1
1
1
1
1
4
3
2
1
0
ADER1/ADER0
R/W
R/W
R/W
R/W
R/W
1
1
1
1
1
Analog input
P-ch
Pin
N-ch
standby control (SBL = 1)
285

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