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CHAPTER 13 16-BIT I/O TIMER
13.5.1
Input Capture Register Details
Input capture has the three registers listed. These registers store a value from the 16-bit
free-run timer when a valid edge of the corresponding external pin input waveform is
detected. (The registers must be accessed in word mode. No values can be written to
the registers.)
• Input capture data register
• Input capture control register
• Input capture edge register
■ Input Capture Data Register
Address:
bit
15
003520
H
003522
H
003524
H
R
003526
H
003528
H
00352A
H
R
:
Read only
216
Figure 13.5-2 Input Capture Data Register (IPCP)
14
13
12
11
10
9
8
R
R
R
R
R
R
R
7
6
5
4
3
2
1
R
R
R
R
R
R
R
0
IPCP0 to IPCP5
R
Initial value
X X X X X X X X X X X X X X X X
IPCPn
lower bits
CP00
Input Capt. Data Reg. 0
CP01
Input Capt. Data Reg. 1
CP02
Input Capt. Data Reg. 2
CP03
Input Capt. Data Reg. 3
CP04
Input Capt. Data Reg. 4
CP05
Input Capt. Data Reg. 5
CP06
Input Capt. Data Reg. 6
CP07
Input Capt. Data Reg. 7
n = 0,1,2,3,4,5
IPCPn
upper bits
CP08
Input Capt. Data Reg. 8
CP09
Input Capt. Data Reg. 9
CP10
Input Capt. Data Reg. 10
CP11
Input Capt. Data Reg. 11
CP12
Input Capt. Data Reg. 12
CP13
Input Capt. Data Reg. 13
CP14
Input Capt. Data Reg. 14
CP15
Input Capt. Data Reg. 15
n = 0,1,2,3,4,5
B
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