Fujitsu MB90390 Series Hardware Manual page 10

3.9 Exceptions ........................................................................................................................................ 80
CHAPTER 4 DELAYED INTERRUPT ............................................................................. 81
4.1 Outline of Delayed Interrupt Module ................................................................................................. 82
4.2 Delayed Interrupt Register ................................................................................................................ 83
4.3 Delayed Interrupt Operation ............................................................................................................. 84
CHAPTER 5 CLOCKS ..................................................................................................... 85
5.1 Clocks ............................................................................................................................................... 86
5.2 Block Diagram of the Clock Generation Block .................................................................................. 89
5.3 Clock Selection Registers ................................................................................................................. 91
5.3.1 Clock Selection Register (CKSCR) ............................................................................................. 92
5.3.2 PLL and Special Configuration Control Register (PSCCR) ......................................................... 95
5.4 Clock Mode ....................................................................................................................................... 97
5.5 Oscillation Stabilization Wait Time .................................................................................................. 100
5.6 Connection of an Oscillator or an External Clock to the Microcontroller ......................................... 101
5.7 Output of the main clock HCLK and HCLKX .................................................................................. 103
CHAPTER 6 CLOCK MODULATOR ............................................................................. 105
6.1 Overview of Clock Modulator .......................................................................................................... 106
6.2 Register Description of Clock Modulator ........................................................................................ 107
6.3 Registers of Clock Modulator .......................................................................................................... 108
6.3.1 Clock Modulator Control Register (CMCR) ............................................................................... 109
6.3.2 Clock Modulation Parameter Register (CMPR) ......................................................................... 114
6.4 Application Note of the Clock Modulator ......................................................................................... 121
CHAPTER 7 RESETS .................................................................................................... 125
7.1 Resets ............................................................................................................................................. 126
7.2 Reset Cause and Oscillation Stabilization Wait Times ................................................................... 128
7.3 External Reset Pin .......................................................................................................................... 130
7.4 Reset Operation .............................................................................................................................. 131
7.5 Reset Cause Bits ............................................................................................................................ 133
7.6 Status of Pins in a Reset ................................................................................................................ 136
CHAPTER 8 LOW-POWER CONTROL CIRCUIT ........................................................ 137
8.1 Overview of Low-Power Consumption Mode .................................................................................. 138
8.2 Block Diagram of the Low-Power Consumption Control Circuit ..................................................... 141
8.3 Low-Power Consumption Mode Control Register (LPMCR) ........................................................... 143
8.4 CPU Intermittent Operation Mode .................................................................................................. 147
8.5 Standby Mode ................................................................................................................................. 148
8.5.1 Sleep Mode ............................................................................................................................... 149
8.5.2 Time-base Timer Mode ............................................................................................................. 151
8.5.3 Stop Mode ................................................................................................................................. 153
8.6 Status Change Diagram ................................................................................................................. 156
8.7 Status of Pins in Standby Mode and during Reset ......................................................................... 158
8.8 Usage Notes on Low-Power Consumption Mode ........................................................................... 159
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